ENIAC Fig. 11-3. Isolation of programs through the use of a pulse amplifier Fig. 10-8. Master programmer links - problem 2 Figure 10-7. Subsequences of seq. 2 - problem 2. PX-8-405 Fig. 10-6. Set-up diagram - problem 1. Master programmer panel 1. PX-8-404 Master programmer links - problem 1. Fig. 10-5 Fig. 10-4. Master programmer set-up diagram conventions Fig. 10-3. Us of a master programmer to delay a program pulse Fig. 10-2 (c). Digit discrimination program to stimulate ... Fig. 10-2 (b). Digit discrimination program ... Master programmer panel 2. PX-8-402 b Fig. 10-2 (a) Digit discrimination program ... PX-8-402a Fig. 10-1. Use of master programmer to stimulate ... Master programmer front panel no. 2 PX-8-302R Master programmer front panel no. 1 PX-8-301R Master programmer front view. PX-8-303 IBM gang punch plug board. PX-12-305R3 IBM gang punch plug board PX-12-305R2 IBM gang punch plug board PX-12-305R1 IBM gang punch plug board PX-12-305R Set-up table Set-up table Set-up table Set-up table Printer front view. PX-12-306 Printer front panel no. 3 PX-12-303R Printer front panel no. 2 PX-12-302R Printer front panel no. 1 PX-12-301R Fig. 8-3 (m). Set-up diagram for sequence 1 and sequence 2.1 Figure 8-3 (1). Set-up diagram for sequence 1 and sequence 2.1 Figure 8-3 (k) Set-up diagram for sequence 1 and sequence 2.1. PX-11-405(k) Fig. 8-3 (j) Set-up diagram for sequence 1 and sequence 2.1 Pages1 2 3 4 next › last »
